FPGA6800HR
 PC/104 dataModule^®
User Application Specific FPGA Designs
(FPGA designed by user or custom designed by RTD)

Operating Temperature -40° to +85°C

FPGA6800HR dataModule®

Rugged IDAN® Configuration

Features:

• Off-the-Shelf FPGA Platforms for user designs
• ISA-bus 16-bit interface
• Xilinx Spartan II XC2S200 FPGA with onboard configuration flash
  •  200,000 system gates
  • 57,344 bits of SRAM (fourteen 4096 bit blocks)
  • TTL compatible 3.3 Volt outputs, 5 Volt Tolerant Inputs
  • Dedicated Clock inputs
  • Programmable Configuration Flash
  • ISA bus connects directly to FPGA
  • Program through JTAG

• 99 Digital I/O or 72 Digital I/O with individual grounds

• Three identical connectors with three configurations each

  • 24 I/O with grounds plus 1 jumper selectable I/O or ground

  • 20 I/O with grounds and 8 I/O without grounds plus 1 jumper selectable I/O or ground

  • 16 I/O with grounds and 16 I/O without grounds plus 1 jumper selectable I/O or ground

• All I/O is ESD protected (human body model)

• Additional onboard devices

  • 50 MHz oscillator connected to Spartan II clock input

  • 8-pin DIP socket for user installed oscillator connected to Spartan II clock input

  • Two 128Kbytes x 8 Fast SRAM (can be used as 256 K x 8 or 128K x 16)

  • One 8254 counter/timer (three 16-bit counter/timers)

  • 20 user defined jumpers (can be used as base address, for example)

  • Tri-color LED

• -24mA / +24mA (source / sink) on all I/O's
• Pull-up/pull-down resistors on each I/O programmable in FPGA
• Mating Connectors
• Three Standard 50-pin 0.1 inch spaced 2 x 25

• Deliverable FPGA code and example

  • Configuration file with pin out

  • VHDL example with simple ISA interface

    • Connector 1 -- 16-bit input with grounds, 8-bit output, and 8-bit programmable as output or ground

    • Connector 2 -- 16-bit input with grounds, 8-bit output, and 8-bit programmable as output or ground

    • Connector 3 -- 16-bit input with grounds, 8-bit output, and 8-bit programmable as output or ground

    •  SRAM I/O mapped

    • Counter/Timer I/O mapped driving LED

• Software
  • DOS application in C to read and write digital I/O in VHDL example

• SK-FPGA6800 Features
  • FPGA6800 utilityModule
  • Xilinx WebPack Software DVD
  • Xilinx Platform Cable USB programming adapter

  • ISA & EISA Theory and Operation by Edward Solari